DS3134 datasheet(47/203 Pages) DALLAS

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DS3134

47 of 203

ISV54

0034h

5432

SLBP7

SLBP6

SLBP5

SLBP4

SLBP3

SLBP2

SLBP1

SLBP0

SLBP15

SLBP14

SLBP13

SLBP12

SLBP11

SLBP10

SLBP9

SLBP8

Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.

Bits 0 to 15 / Status Bit for Change of State in Receive V.54 Loopback Detector (SLBP0 to

SLBP15).

0 = interrupt masked

1 = interrupt unmasked

SDMA

0028h

5432

RLBRE

RLBR

ROVFL

RLENC

RABRT

RCRCE

n/a

TDQWE

TDQW

TPQR

TUDFL

RDQWE

RDQW

RSBRE

RSBR

Note: Bits that are underlined are read only, all other bits are read-write; default value for all bits is 0.

Bit 2 / Status Bit for Receive HDLC CRC Error (RCRCE). This status bit will be set to a one if any

of the receive HDLC channels experiences a CRC check sum error. The RCRCE bit will be cleared when

read and will not be set again until another CRC check sum error has occurred. If enabled via the RCRCE

bit in the Interrupt Mask for SDMA (ISDMA), the setting of this bit will cause a hardware interrupt at the

PCI Bus via the PINTA* signal pin and also at the LINT* if the Local Bus is in the Configuration Mode.

Bit 3 / Status Bit for Receive HDLC Abort Detected (RABRT). This status bit will be set to a one if

any of the receive HDLC channels detects an abort. The RABRT bit will be cleared when read and will

not be set again until another abort has been detected. If enabled via the RABRT bit in the Interrupt Mask

for SDMA (ISDMA), the setting of this bit will cause a hardware interrupt at the PCI Bus via the PINTA*

signal pin and also at the LINT* if the Local Bus is in the Configuration Mode.

Bit 4 / Status Bit for Receive HDLC Length Check (RLENC). This status bit will be set to a one if

any of the HDLC channels:

- Exceeds the octet length count (if so enabled to check for octet length)

- Receives a HDLC packet that does not meet the minimum length criteria of either 4 or 6 bytes

- Experiences a non-integral number of octets in between opening and closing flags.

The RLENC bit will be cleared when read and will not be set again until another length violation has

occurred. If enabled via the RLENC bit in the Interrupt Mask for SDMA (ISDMA), the setting of this bit

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