AP0100CS datasheet(11/73 Pages) ONSEMI

11 / 73 page

AP0100CS/D Rev. 6, Pub. 1/16 EN

©Semiconductor Components Industries, LLC,2016.

AP0100CS HDR: Image Signal Processor (ISP)

On-Chip Regulator

The AP0100CS has an on-chip regulator, the output from the regulator is 1.2 V and

should only be used to power up the AP0100CS. It is possible to bypass the regulator and

provide power to the relevant pins that need 1.2 V. Figure 5 shows how to configure the

AP0100CS to bypass the internal regulator.

Figure 5:

External Regulator

The following table summarizes the key signals when using/bypassing the regulator.

Table 5:

Key Signals When Using the Regulator

Signal Name

Internal Regulator

External Regulator

VDD_REG

1.8 V

Connect to VDDIO_H

ENLDO

Connect to 1.8 V (VDD_REG)

GND

FB_SENSE

1.2 V (output)

Float

LDO_OP

1.2 V (output)

Float

EXT_REG

GND

Connect to VDDIO_H

VDDIO _S

VDDIO _H

Sensor IO

power

Host IO

power

M_SCLK

M_SDATA

EXTCLK_OUT

RESET_BAR_OUT

FV _IN

LV_IN

PIXCLK _IN

DIN [11:0]

TRIGGER_OUT

GND

FV_OUT

LV_OUT

PIXCLK_OUT

DOUT[15:0]

SCLK

SDATA

SADDR

SPI_CS_BAR

SPI_CLK

SPI_SDO

SPI_SDI

TRST_BAR

OTPM

power

GPIO_1

GPIO_2

GPIO_3

GPIO_4

GPIO_5

EXTCLK

XTAL

DAC_POS

DAC_NEG

DAC_REF

CLK_N CLK_P

DATA0_N DATA0_P

DATA1_N DATA1_P

External supplied

1.2V

DAC

analog

power

PHY

power

FRAME_SYNC

STANDBY

Host IO

power

Host IO

power

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