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AP0100CS Arkusz danych(PDF) 33 Page - ON Semiconductor

Numer części AP0100CS
Szczegółowy opis  High-Dynamic Range (HDR) Image Signal Processor (ISP)
PDF  73 Pages
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AP0100CS Arkusz danych(HTML) 33 Page - ON Semiconductor

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AP0100CS/D Rev. 6, Pub. 1/16 EN
33
©Semiconductor Components Industries, LLC,2016.
AP0100CS HDR: Image Signal Processor (ISP)
Output Formatting
Figure 21:
Typical CCIR656 Output
Data[7:0]
Line Valid
Frame Valid
Field 1
Cb
YCr
Y
Cb
YCrY
80
10
80
10
80
10
10
80
10
80
10
80
10
80
10
Cb
Y
Cr
Y
FF
00
00
80
80
FF
00
00
9D
FF
00
00
80
Cb
Y
Cr
Y
80
10
80
10
FF
00
00
9D
SAV
Image
EAV
SAV
Image
EAV
HBlank
HBlank
Blanking
Blanking
Blanking
HBlank
Data[7:0]
Line Valid
Frame Valid
Cb
YCr
Y
Cb
YCrY
80
10
80
10
80
10
10
80
10
80
10
80
10
80
10
80
10
80
10
FF
00
00
80
80
FF
00
00
B6
FF
00
00
AB
80
10
80
10
80
10
80
10
FF
00
00
B6
SAV
Image
EAV Blank
SAV Blank
VBlank
EAV blank
HBlank
HBlank
Blanking
Blanking
Blanking
HBlank
Pixel Clock
Pixel Clock
Data[7:0]
Line Valid
Frame Valid
Cb
YCr
Y
Cb
YCrY
80
10
80
10
80
10
10
80
10
80
10
80
10
80
10
Cb
Y
Cr
Y
FF
00
00
C7
80
FF
00
00 DA
FF
00
00
C7
Cb
Y
Cr
Y
80
10
80
10
FF
00
00 DA
SAV
Image
EAV
SAV
Image
EAV
HBlank
HBlank
Blanking
Blanking
Blanking
HBlank
Data[7:0]
Line Valid
Frame Valid
Cb
YCr
Y
Cb
YCrY
80
10
80
10
80
10
10
80
10
80
10
80
10
80
10
80
10
80
10
FF
00
00
C7
80
FF
00
00
F1
FF
00
00 EC
80
10
80
10
80
10
80
10
FF
00
00
F1
SAV
Image
EAV Blank
SAV Blank
VBlank
EAV blank
HBlank
HBlank
Blanking
Blanking
Blanking
HBlank
Pixel Clock
Pixel Clock
Field 2
Data[15:8]
00
Data[15:8]
00
Data[15:8]
00
Data[15:8]
00



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