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STM32L071X8 Arkusz danych(PDF) 32 Page - STMicroelectronics |
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STM32L071X8 Arkusz danych(HTML) 32 Page - STMicroelectronics |
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32 / 136 page ![]() Functional overview STM32L071xx 32/136 DocID027101 Rev 3 Only a 32.768 kHz clock (LSE) is needed to allow LPUART communication up to 9600 baud. Therefore, even in Stop mode, the LPUART can wait for an incoming frame while having an extremely low energy consumption. Higher speed clock can be used to reach higher baudrates. LPUART interface can be served by the DMA controller. 3.15.4 Serial peripheral interface (SPI)/Inter-integrated sound (I2S) Up to two SPIs are able to communicate at up to 16 Mbits/s in slave and master modes in full-duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC generation/verification supports basic SD Card/MMC modes. The USARTs with synchronous capability can also be used as SPI master. One standard I2S interfaces (multiplexed with SPI2) is available. It can operate in master or slave mode, and can be configured to operate with a 16-/32-bit resolution as input or output channels. Audio sampling frequencies from 8 kHz up to 192 kHz are supported. When the I2S interfaces is configured in master mode, the master clock can be output to the external DAC/CODEC at 256 times the sampling frequency. The SPIs can be served by the DMA controller. Refer to Table 13 for the differences between SPI1 and SPI2. 3.16 Cyclic redundancy check (CRC) calculation unit The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a configurable generator polynomial value and size. Among other applications, CRC-based techniques are used to verify data transmission or storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of the software during runtime, to be compared with a reference signature generated at linktime and stored at a given memory location. 3.17 Serial wire debug port (SW-DP) An ARM SW-DP interface is provided to allow a serial wire debugging tool to be connected to the MCU. Table 13. SPI/I2S implementation SPI features(1) 1. X = supported. SPI1 SPI2 Hardware CRC calculation X X I2S mode - X TI mode X X |
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