TUSB2136PM datasheet(36/50 Pages) TI

36 / 50 page

2–24

2.10 I2C Registers

The TUSB2136 only supports a master-slave relationship; therefore, it does not support bus arbitration.

2.10.1 I2CSTA: I2C Status and Control Register

This register is used to control the stop condition for read and write operations. In addition, it provides transmitter and

receiver handshake signals with their respective interrupt enable bits.

210

RXF

RIE

ERR

1/4

TXE

TIE

SRD

SWR

R/C

R/W

R/C

R/W

R/C

R/W

BIT

NAME

RESET

FUNCTION

SWR

Stop write condition. This bit defines whether the I2C controller generates a stop condition when data from

the I2CDAO register is transmitted to an external device.

SWR = 0

Stop condition is not generated when data from I2CDAO register is shifted out to an external

device.

SWR = 1

Stop condition is generated when data from I2CDAO register is shifted out to an external device.

SRD

Stop read condition. This bit defines whether the I2C controller generates a stop condition when data is

received and loaded into I2CDAI register.

SRD = 0

Stop condition is not generated when data from SDA line is shifted into the I2CDAI register.

SRD = 1

Stop condition is generated when data from SDA line is shifted into the I2CDAI register.

TIE

I2C transmitter empty interrupt enable

TIE = 0

Interrupt disabled

TIE = 1

Interrupt enabled

TXE

I2C transmitter empty. This bit indicates that data can be written to the transmitter. It can be used for polling or

it can generate an interrupt.

TXE = 0

Transmitter is full. This bit is cleared when the MCU writes a byte to I2CDAO register.

TXE = 1

Transmitter is empty. The I2C controller sets this bit when the content of the I2CDAO register is

copied to the SDA shift register.

1/4

Bus speed selection

1/4 = 0

100-kHz bus speed

1/4 = 1

400-kHz bus speed

ERR

Bus error condition. This bit is set by the hardware when the device does not respond. It is cleared by the

MCU.

ERR = 0

No bus error

ERR = 1

Bus error condition has been detected. Clears when MCU writes a 1. Writing a 0 has no effect.

RIE

I2C receiver ready interrupt enable

RIE = 0

Interrupt disabled

RIE = 1

Interrupt enabled

RXF

I2C receiver full. This bit indicates that the receiver contains new data. It can be used for polling or it can

generate an interrupt.

RXF = 0

Receiver is empty. This bit is cleared when MCU reads the I2CDAI register.

RXF = 1

Receiver contains new data. This bit is set by the I2C controller when the received serial data has

been loaded into I2CDAI register.

TUSB2136PM Arkusz danych(PDF) 36 Page - Texas Instruments

TUSB2136PM Arkusz danych(HTML) 36 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Arkusz danych Pobierz

Link URL