LPC802 datasheet(24/83 Pages) NXP

24 / 83 page

LPC802

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Product data sheet

Rev. 1.6 — 27 April 2018

24 of 83

NXP Semiconductors

LPC802

32-bit ARM Cortex-M0+ microcontroller

9.19.1 Features

• Selectable 0 mV, 10 mV ( 5 mV), and 20 mV ( 10 mV), 40 mV ( 20 mV) input

hysteresis.

• Two selectable external voltages (VDD or ACMPVREF); fully configurable on either

positive or negative input channel.

• Internal voltage reference from band gap selectable on either positive or negative

input channel.

• 32-stage voltage ladder with the internal reference voltage selectable on either the

positive or the negative input channel.

• Voltage ladder source voltage is selectable from an external pin or the main 3.3 V

supply voltage rail.

• Voltage ladder can be separately powered down for applications only requiring the

comparator function.

• Interrupt output is connected to NVIC.

• Comparator level output is connected to output pin ACMP_O.

• One comparator output is internally collected to the ADC trigger input multiplexer.

Fig 11. Comparator block diagram

aaa-028402

SYNC

COMPSA

to ACMP_O

n.c.

COMSTAT

COMPEDGE

(to INTERRUPT)

EDGECLR or

ACOMP_RST_N

2 of 3

sampling

edge detect

EDGESEL

ACOMP_RST_N

buf

ACOMP_PD

COMP_VP_SEL

LADREF

LADEN and nACOMP_PD

voltage

ladder out

ext. VDDCMP VDD

COMP_VM_SEL

ACMP_I1

ACMP_I2

ACMP_I3

ACMP_I4

CONTROL / STATUS REGISTER BITS

HYS

buf

LADSEL

VSS

internal bandgap

reference voltage

VSS

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