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ADRF5160BCPZ-R7 Arkusz danych(PDF) 5 Page - Analog Devices

Numer części ADRF5160BCPZ-R7
Szczegółowy opis  High Power, 88 W Peak, Silicon SPDT, Reflective Switch, 0.7 GHz to 4.0 GHz
PDF  12 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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ADRF5160BCPZ-R7 Arkusz danych(HTML) 5 Page - Analog Devices

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Data Sheet
ADRF5160
Rev. 0 | Page 5 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NOTES
1. EXPOSED PAD. EXPOSED PAD MUST BE
CONNECTED TO RF/DC GROUND.
24 GND
23 GND
22 GND
21 RF2
20 GND
19 GND
18 GND
17 GND
1
2
3
4
5
6
7
8
GND
GND
GND
RF1
GND
GND
GND
GND
ADRF5160
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1 to 3, 5 to 11, 13 to 20, 22 to 27, 30 to 32
GND
Ground. The package bottom has an exposed metal pad that must connect to
the PCB RF/dc ground.
4
RF1
RF Port 1. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is
required on this pin. See Figure 3 for the interface schematic.
12
RFC
RF Common Port. This pin is dc-coupled and matched to 50 Ω. A dc blocking
capacitor is required on this pin. See Figure 3 for the interface schematic.
21
RF2
RF Port 2. This pin is dc-coupled and matched to 50 Ω. A dc blocking capacitor is
required on this pin. See Figure 3 for the interface schematic.
28
VCTL
Control Input Pin. See Figure 4 for the VCTL interface schematic. Refer to Table 5
for the signal path and the recommended input control voltage range shown in
Table 1.
29
VDD
Supply Voltage Pin.
EPAD
Exposed Pad. Exposed pad must be connected to RF/dc ground.
INTERFACE SCHEMATICS
RFC,
RF1,
RF2
Figure 3. RFC, RF1, and RF2 Interface Schematic
VCTL
VDD
VDD
Figure 4. Control Input (VCTL) Interface Schematic



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