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ADRF5160BCPZ-R7 Arkusz danych(PDF) 8 Page - Analog Devices

Numer części ADRF5160BCPZ-R7
Szczegółowy opis  High Power, 88 W Peak, Silicon SPDT, Reflective Switch, 0.7 GHz to 4.0 GHz
PDF  12 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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ADRF5160BCPZ-R7 Arkusz danych(HTML) 8 Page - Analog Devices

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ADRF5160
Data Sheet
Rev. 0 | Page 8 of 12
THEORY OF OPERATION
The ADRF5160 requires a single-supply voltage applied to the
VDD pin. Bypassing capacitors are recommended on the supply
line to minimize RF coupling.
The ADRF5160 is controlled via a digital control voltage
applied to the VCTL pin. A bypassing capacitor is recommended
on this digital signal line to improve the RF signal isolation.
The ADRF5160 is internally matched to 50 Ω at the RF input
port (RFC) and the RF output ports (RF1 and RF2). Therefore,
no external matching components are required. The RFx pins
are dc-coupled, and dc blocking capacitors are required on the
RFx lines. The design is bidirectional, meaning that the input
and outputs are interchangeable.
The ideal power-up sequence is as follows:
1. Connect GND.
2. Power up VDD.
3. Power up the digital control input. Power the digital
control input before the VDD supply to avoid inadvertently
forward biasing and damaging the ESD protection
structures.
4. Power up the RF input.
Depending on the logic level applied to the VCTL pin, one RF
output port (for example, RF1) is set to on mode, by which an
insertion loss path is provided from the input to the output.
While the other RF output port (for example, RF2) is set to off
mode, by which the output is isolated from the input.
Table 5. Switch Operation Mode
Signal Path
Digital Control Input (VCTL)
RF1 to RFC
RF2 to RFC
Low
Isolation (off)
Insertion loss (on)
High
Insertion loss (on)
Isolation (off)



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