P5021 datasheet(9/155 Pages) NXP

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Pin assignments and reset states

P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Freescale Semiconductor

1.2

Pinout list

This table provides the pinout listing for the 1295 FC-PBGA package by bus.

Table 1. Pins listed by bus

Signal

Signal description

Package

pin number

type

Power

supply

Notes

DDR SDRAM Memory interface 1

D1_MDQ00

Data

A17

I/O

GVDD

—

D1_MDQ01

Data

D17

I/O

GVDD

—

D1_MDQ02

Data

C14

I/O

GVDD

—

D1_MDQ03

Data

A14

I/O

GVDD

—

D1_MDQ04

Data

C17

I/O

GVDD

—

D1_MDQ05

Data

B17

I/O

GVDD

—

D1_MDQ06

Data

A15

I/O

GVDD

—

D1_MDQ07

Data

B15

I/O

GVDD

—

D1_MDQ08

Data

D15

I/O

GVDD

—

D1_MDQ09

Data

G15

I/O

GVDD

—

D1_MDQ10

Data

E12

I/O

GVDD

—

D1_MDQ11

Data

G12

I/O

GVDD

—

D1_MDQ12

Data

F16

I/O

GVDD

—

D1_MDQ13

Data

E15

I/O

GVDD

—

D1_MDQ14

Data

E13

I/O

GVDD

—

D1_MDQ15

Data

F13

I/O

GVDD

—

D1_MDQ16

Data

I/O

GVDD

—

D1_MDQ17

Data

D12

I/O

GVDD

—

D1_MDQ18

Data

I/O

GVDD

—

D1_MDQ19

Data

E10

I/O

GVDD

—

D1_MDQ20

Data

C11

I/O

GVDD

—

D1_MDQ21

Data

C10

I/O

GVDD

—

D1_MDQ22

Data

I/O

GVDD

—

D1_MDQ23

Data

I/O

GVDD

—

D1_MDQ24

Data

I/O

GVDD

—

D1_MDQ25

Data

F11

I/O

GVDD

—

D1_MDQ26

Data

H10

I/O

GVDD

—

D1_MDQ27

Data

J10

I/O

GVDD

—

D1_MDQ28

Data

F10

I/O

GVDD

—

D1_MDQ29

Data

I/O

GVDD

—

D1_MDQ30

Data

I/O

GVDD

—

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