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STM32F732IE Arkusz danych(PDF) 107 Page - STMicroelectronics |
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STM32F732IE Arkusz danych(HTML) 107 Page - STMicroelectronics |
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107 / 226 page ![]() DS11854 Rev 6 107/226 STM32F732xx STM32F733xx Electrical characteristics 198 6.3.3 Operating conditions at power-up/power-down (regulator ON) Subject to general operating conditions for TA. Table 20. Operating conditions at power-up/power-down (regulator ON) 6.3.4 Operating conditions at power-up/power-down (regulator OFF) Subject to general operating conditions for TA. Table 19. VCAP1 operating conditions in the LQFP64 package(1) 1. When bypassing the voltage regulator, the 4.7 µF VCAP capacitor is not required and should be replaced by two 100 nF decoupling capacitors. Symbol Parameter Conditions CEXT Capacitance of external capacitor 4.7 µF ESR ESR of external capacitor between 0.1 Ω and 0.2 Ω Symbol Parameter Min Max Unit tVDD VDD rise time rate 20 ∞ µs/V VDD fall time rate 20 ∞ Table 21. Operating conditions at power-up/power-down (regulator OFF)(1) 1. To reset the internal logic at power-down, a reset must be applied on pin PA0 when VDD reaches below 1.08 V. Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate Power-up 20 ∞ µs/V VDD fall time rate Power-down 20 ∞ tVCAP VCAP_1 and VCAP_2 rise time rate Power-up 20 ∞ VCAP_1 and VCAP_2 fall time rate Power-down 20 ∞ |
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