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MB90F474LPF Arkusz danych(PDF) 57 Page - fujitsu semiconductor |
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MB90F474LPF Arkusz danych(HTML) 57 Page - fujitsu semiconductor |
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57 / 118 page ![]() MB90470 Series 57 (2) Block Diagram ICCR EN ICCR IBSR BB RSC LRB Last Bit Repeat start Bus busy Send/receive TRX FBT AL IBCR BER BEIE INTE INT IBCR SCC MSS ACK GCAA IBSR IDAR Slave address compare IADR AAS GCA CS4 CS3 CS2 CS1 CS0 2 4 8 16 128 256 32 64 56 7 Clock divider 1 Clock select 1 Clock divider 2 Clock select 2 Peripheral clock 8 Sync First Byte IRQ End Interrupt request SCL SDA I2C enable Shift clock generator Shift clock edge change timing Start/stop condition detector Start/stop condition generator Arbitration lost detector Error Start Master ACK enable GC-ACK enable Slave Global call |
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