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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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MB90F474LPF Arkusz danych(PDF) 73 Page - fujitsu semiconductor |
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MB90F474LPF Arkusz danych(HTML) 73 Page - fujitsu semiconductor |
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73 / 118 page  MB90470 Series 73 18. Overview of the Chip Select Function This module issues chip select signals in order to facilitate connection to external memory. There are four chip select output pins, with hardware areas set using a register for each output, so that the select signal is output from the related pin whenever access to an external address is detected. • Features of the chip select function The chip select function has two 8-bit registers for settings for each of the four output pins. One register (CARx) is used to specify the upper 8 bits of the address for match detection, thereby providing memory area detection in 64 KB units. The other register (CMRx) can be set to detect areas larger than 64 KB by masking bits in the match detection value. Note that the CS output is set to high impedance during a bus hold condition. (1) Register List Chip select area MASK register (CMRx) Chip select area register (CARx) Chip select control register (CSCR) Chip selector active level register (CALR) 0000C0H 0000C2H 0000C4H 0000C6H Read/write Default value 0000C1H 0000C3H 0000C5H 0000C7H Read/write Default value 0000C8H Read/write Default value 0000C9H Default value CMR1 CMR0 CAR0 (R/W) (R/W) CAR1 15 0 CMR3 CMR2 CAR2 (R/W) (R/W) CAR3 CSCR (R/W) CALR (R/W) 87 (R/W) ( 0 ) (R/W) ( 0 ) (R/W) ( 0 ) (R/W) ( 1 ) (R/W) ( 1 ) (R/W) ( 1) (R/W) ( 1 ) 76 5 4 3 2 1 0 M6 (R/W) ( 0 ) M7 M5 M4 M3 M2 M1 M0 (R/W) ( 1 ) (R/W) ( 1 ) (R/W) ( 1 ) (R/W) ( 1 ) (R/W) ( 1 ) (R/W) ( 1 ) (R/W) ( 1 ) 15 14 13 12 11 10 9 8 A6 (R/W) ( 1 ) A7 A5 A4 A3 A2 A1 A0 ( ) ( ) ( ) ( ) ( ) ( ) (R/W) ( 0 ) (R/W) ( 0 ) (R/W) ( 0 ) (R/W) ( ∗ ) 76 5 4 3 2 1 0 ( ) ( ) OPL3 OPL2 OPL1 OPL0 ( ) ( ) ( ) ( ) ( ) ( ) (R/W) ( 0 ) (R/W) ( 0 ) (R/W) ( 0 ) (R/W) ( 0 ) 15 14 13 12 11 10 9 8 ( ) ( ) ACTL3 ACTL2 ACTL1 ACTL0 |
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