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BLUENRG-332VC Arkusz danych(PDF) 47 Page - STMicroelectronics |
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BLUENRG-332VC Arkusz danych(HTML) 47 Page - STMicroelectronics |
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47 / 67 page ![]() Table 36. Output voltage characteristics Symbol Parameter Conditions Min. Max. Unit VOL Output low level voltage for I/O pin CMOS port(1) |IIO| = 8 mA VDD ≥ 2.7 V - 0.4 V VOH Output high level voltage for I/O pin VDD -0.4 - VOL Output low level voltage for I/O pin |IIO| = 20 mA VDD ≥ 2.7 V - 1.3 VOH Output high level voltage for I/O pin VDD -1.3 - VOL Output low level voltage for I/O pin |IIO| = 4 mA VDD ≥ 1.62 V - 0.4 VOH Output high level voltage for I/O pin VDD-0.45 - 1. CMOS outputs are compatible with JEDEC standards JESD36 and JESD52. 6.3.17 RSTN pin characteristics The RSTN pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU. Unless otherwise specified, the parameters given in the table below are derived from tests performed under the ambient temperature and supply voltage conditions summarized in Section 6.3.2 General operating conditions. Table 37. RSTN pin characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit. VIL(RSTN) RSTN input low level voltage - - - 0.3 x VDD V VIH(RSTN) RSTN input high level voltage - 0.7 x VDD - - Vhys(RSTN) RSTN Schmitt trigger voltage hysteresis - - 200 - mV RPU Weak pull-up equivalent resistor VIN=GND 25 40 55 kΩ Figure 14. Recommended RSTN pin protection Note: The external reset circuit protects the device against parasitic resets. The user must ensure that the level on the RSTN pin can go below the VIL(RSTN) max. level specified in the table, otherwise the reset is not taken into account by the device. The external capacitor on RSTN must be placed as close as possible to the device. BlueNRG-LPS Operating conditions DS13819 - Rev 4 page 47/67 |
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