LP3972 datasheet(46/59 Pages) NSC

46 / 59 page

2C Compatible Interface (Continued)

INTEL INTERNAL 1 REVISION REGISTER (II1RR) 8H’8E

Bit

76543210

Designation

II1RR

Reset Value

00000000

INTEL INTERNAL 1 REVISION REGISTER (II1RR) 8H’8E DEFINITIONS

Bit

Access

Name

Description

7:0

II1RR

Intel internal usage register for revision information.

INTEL INTERNAL 2 REVISION REGISTER (II2RR) 8H’8F

Bit

76543210

Designation

II2RR

Reset Value

00000000

INTEL INTERNAL 2 REVISION REGISTER (II2RR) 8H’8F DEFINITIONS

Bit

Access

Name

Description

7:0

II2RR

Intel internal usage register for revision information.

Example 1) Start of Day Sequence

PMIC Register

Address

PMIC Register

Name

Description

8h’23

ADTVI

00011011

Sets the SOD V

CC_APPS voltage

8h’29

SDTV1

00011011

Sets the SOD V

CC_SRAM voltage

8h’10

OVER1

00000111

Enables V

CC_SRAM and VCC_APPS to their programmed values.

SODl Multi-byte random register transfer is outlined below:

20207644

Device Address,

Data, Ach Register M Address, Ach,

Address, Ach, Register X Data, Ach

Data, Ach, Stop

LP3972 Arkusz danych(PDF) 46 Page - National Semiconductor (TI)

LP3972 Arkusz danych(HTML) 46 Page - National Semiconductor (TI)

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