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LP3972 Arkusz danych(PDF) 52 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Numer części LP3972
Szczegółowy opis  Power Management Unit for Advanced Application Processors
PDF  59 Pages
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Producent  NSC [National Semiconductor (TI)]
Strona internetowa  http://www.national.com
Logo NSC - National Semiconductor (TI)

LP3972 Arkusz danych(HTML) 52 Page - National Semiconductor (TI)

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Application Note - LP3972 Reset Sequence
INITIAL COLD START POWER ON SEQUENCE
1.
The Back up battery is connected to the PMU, power is
applied to the back-up battery pin, the RTC_LDO turns
on and supplies a stable output voltage to the
V
CC_BATT pin of the Applications processor (initiating
the power-on reset event) with nRSTO asserted from the
LP3972 to the processor.
2.
nRSTO de-asserts after a minimum of 50 mS.
3.
The Applications processor waits for the de-assertion of
nBATT_FLT to indicate system power (V
IN) is available.
4.
After system power (V
IN) is applied, the LP3972 de-
asserts nBATT_FLT. Note that BOTH nRSTO and
nBATT_FLT need to be de-asserted before SYS_EN is
enabled. The sequence of the two signals is indepen-
dent of each other.
5.
The Applications processor asserts SYS_EN, the
LP3972 enables the system high-voltage power sup-
plies. The Applications processor starts its countdown
timer set to 125 mS.
6.
The LP3972 enables the high-voltage power supplies.
— LDO1 power for V
CC_MVT (Power for internal logic
and I/O Blocks), BG (Bandgap reference voltage),
OSC13M (13 MHz oscillator voltage) and PLL en-
abled first, followed by others if delay is on.
7.
Countdown timer expires; the Applications processor
asserts PWR_EN to enable the low-voltage power sup-
plies. The processor starts the countdown timer set to
125 mS period.
8.
The Applications processor asserts PWR_EN (ext. pin or
I
2C), the LP3972 enables the low-voltage regulators.
9.
Countdown timer expires; If enabled power domains are
OK (I
2C read) the power up sequence continues by
enabling the processors 13 MHz oscillator and PLL’s.
10. The Applications processor begins the execution of
code.
20207622
* Note that BOTH nRSTO and nBATT_FLT need to be de-asserted before SYS_EN is enabled. The sequence of the two signals is independent of each other and
can occur is either order.
www.national.com
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