TLC876M, TLC876I, TLC876C

10-BIT 20 MSPS PARALLEL OUTPUT CMOS

ANALOG-TO-DIGITAL CONVERTERS

SLAS140E – JULY 1997 – REVISED OCTOBER 2000

6

POST OFFICE BOX 655303

power supply

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

AVDD†

17

25

mA

IDD

Operating supply current

DVDD†

2.7

5

mA

DRVDD

25

100

µA

PD

Power dissipation

107

150

mW

PD(STBY) Standby power

STBY = High

CLK running

45

85

mW

PD(STBY) Standby power

STBY = High

CLK inhibited at VDD or 0 V

15

35

mW

† The voltage difference between AVDD and DVDD terminals cannot exceed 0.5 V to maintain performance specifications.

digital logic inputs

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IIH

High-level input current, STBY, OE

DVDD = 5 V

1.9

mA

IIH

High-level input current, all other inputs

DVDD = 5 V

10

µA

IIL

Low-level input current

DVDD = 5V

–50

50

µA

IIL(CLK) Low-level input current, CLK

DVDD = 5V

–10

10

µA

Ci

Input capacitance

5

pF

logic outputs

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IOH =50 µA

DRVDD = 3 V

2.4

VOH

High-level output voltage

IOH = 50 µA

DRVDD = 5 V

3.8

V

IOH = 0.5 mA

DRVDD = 5 V

2.4

IOL =50 µA

DRVDD = 3.6 V

0.7

VOL

Low-level output voltage

IOL = 50 µA

DRVDD = 5.25 V

1.05

V

IOL = 0.6 mA

DRVDD = 5.25 V

0.4

Co

Output capacitance

5

pF

IOZ

High-impedance-state output current

–10

10

µA