TLC876CDBLE datasheet(14/22 Pages) TI

14 / 22 page

TLC876M, TLC876I, TLC876C

10-BIT 20 MSPS PARALLEL OUTPUT CMOS

ANALOG-TO-DIGITAL CONVERTERS

SLAS140E – JULY 1997 – REVISED OCTOBER 2000

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

driving the analog input (continued)

The expanded input circuit shown in Figure 15 aids in understanding the voltage offset generation when using

the external input circuit in Figure 14.

The ac-coupling capacitors, C1 and C2, integrate the switching transients present at the input of the TLC876

causing a net dc bias current, IB, to flow into the input. The magnitude of this bias current increases with

increasing the dc signal level, VB, and also increases with sample frequency. When the sample clock frequency

is 20 MHz, the dc bias current is approximately 30

µA† at VBIAS equal to 3 V dc. This bias current causes an

offset error of (R1 + R2) x IB at the AIN terminal. Making R2 negligibly small or modifying VBIAS to account for

the resultant offset can compensate for this error. Note however that R2 loads the signal driving source, and

the value must be sufficient for the application.

For example, as shown in Figure 15, when VBIAS is 3 V and the resistor values stated above, the bias current

causes a 31.5 mV‡ offset from the 3 V bias, VBIAS, at the AIN terminal. For the TLC876, VBIAS can be as low

as 1 V for a 2 V peak-to-peak input signal swing.

AIN

VIN

–

VBIAS

TLC876

RSW

Figure 15. Bias Current and Offset

For systems that require dc-coupling, an op-amp can level-shift a ground-referenced signal to comply with the

input requirements of the TLC876. Figure 16 shows an amplifier in an inverting mode with ac signal gain of –1.

The dc voltage at the noninverting input of the op-amp controls the amount of dc level shifting. A resistive voltage

divider attenuates the REFBF signal and the op-amp then multiplies the attenuated signal by 2. In the case

where REFBF = 1.6 V, the dc output level is 2.6 V which is approximately equal to (V(REFTF) – V(REFBF)/2.

† IB(AVG) = CE (VB) fCLK ≈ 30 µA, with RSW = 50 Ω, CE = 5 pF, R1 = 50 Ω, and R2 = 1 kΩ

‡ VOFFSET = IB(AVG) (R1 + R2)

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