M50FW040 datasheet(28/53 Pages) STMICROELECTRONICS

28 / 53 page

Status Register

M50FW040

28/53

5.0.6

Program Suspend status (Bit 2)

The Program Suspend Status bit indicates that a Program operation has been suspended

and is waiting to be resumed. The Program Suspend Status should only be considered valid

when the Program/Erase Controller Status bit is ‘1’ (Program/Erase Controller inactive);

after a Program/Erase Suspend command is issued the memory may still complete the

operation rather than entering the Suspend mode.

When the Program Suspend Status bit is ‘0’ the Program/Erase Controller is active or has

completed its operation; when the bit is ‘1’ a Program/Erase Suspend command has been

issued and the memory is waiting for a Program/Erase Resume command.

When a Program/Erase Resume command is issued the Program Suspend Status bit

returns to ‘0’.

5.0.7

Block Protection status (Bit 1)

The Block Protection Status bit can be used to identify if the Program or Erase operation has

tried to modify the contents of a protected block. When the Block Protection Status bit is to

‘0’ no Program or Erase operations have been attempted to protected blocks since the last

Clear Status Register command or hardware reset; when the Block Protection Status bit is

‘1’ a Program or Erase operation has been attempted on a protected block.

Once it is set to ‘1’ the Block Protection Status bit can only be reset to ‘0’ by a Clear Status

Program or Erase command is issued, otherwise the new command will appear to fail.

Using the A/A Mux Interface the Block Protection Status bit is always ‘0’.

5.0.8

Reserved (Bit 0)

Bit 0 of the Status Register is reserved. Its value should be masked.

M50FW040 Arkusz danych(PDF) 28 Page - STMicroelectronics