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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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TCS3530 Arkusz danych(PDF) 77 Page - OSRAM GmbH |
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TCS3530 Arkusz danych(HTML) 77 Page - OSRAM GmbH |
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77 / 106 page  Page 76 Datasheet, Public Document Feedback [v3-00] 2023-Jun-23 TCS3530 − Register O ver view MOD_RESIDUAL_CFG2 Register Figure 108: MOD_RESIDUAL_CFG2 Note(s): 1. Return to the Register Map (0xEA). VSYNC_DELAY_CFG0 Register Figure 109: VSYNC_DELAY_CFG0 Note(s): 1. Return to the Register Map (0xEB). Addr: 0xEA MOD_RESIDUAL_CFG2 Bit Field Reset Type Bit Description 7:3 MOD_RESIDUAL_ RELATIVE_ STEPS_3 0R/W Relative number of steps to add to 16 steps in case of number of residual bits 4. 2:0 MOD_RESIDUAL_ RELATIVE_ STEPS_2 0R/W Relative number of steps to add to 2 steps in case of number of residual bits 1. Addr: 0xEB VSYNC_DELAY_CFG0 Bit Field Reset Type Bit Description 7:0 VSYNC_DELAY[7:0] 0 R/W Sets the time to delay an input from the VSYNC pin in multiples of 1.3888μs. The selectable range is 1.3888μs to 2^14*1.3888μs=22.754ms. ATTENTION: Reset value must be 0 so that RAM initialization works. |
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