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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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TSL2521 Arkusz danych(PDF) 62 Page - OSRAM GmbH |
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TSL2521 Arkusz danych(HTML) 62 Page - OSRAM GmbH |
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62 / 81 page  Datasheet, Public Page 61 [v3-00] 2022-Dec-21 Document Feedback TSL2521 − Register Overview VSYNC_CFG Register Figure 78: VSYNC_CFG Note(s): 1. Return to the Register Map (0xF7). Addr: 0xF7 VSYNC_CFG Bit Field Reset Type Bit Description 7:6 OSC_CALIB_MODE 0 R/W Oscillator Calibration Mode Register 00: Osc cal disabled 01: Osc cal after PON, if PON goes to “1” or after each VSYNC_LOST goes to “0” an oscillator calibration is performed if no measurement cycle is active 10: Osc cal always on, an oscillator calibration is permanently performed if no measurement cycle is active and no VSYNC_LOST is set. 11: Reserved, do not use 5:3 Reserved 0 2 VSYNC_MODE 0 R/W Determines which VSYNC signal is used as a trigger 0: Use the external pin signal from VSYNC/GPIO/INT as a trigger 1: Use SW_VSYNC_TRIGGER as a trigger 1 VSYNC_SELECT 0 R/W Determines whether the external VSYNC/GPIO pin or the INT pin is used a trigger signal 0: VSYNC/GPIO 1: INT 0 VSYNC_INVERT 0 R/W If set to “1” the vsync input signal is inverted. |
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