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TSL2521 Arkusz danych(PDF) 27 Page - OSRAM GmbH |
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TSL2521 Arkusz danych(HTML) 27 Page - OSRAM GmbH |
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27 / 81 page ![]() Page 26 Datasheet, Public Document Feedback [v3-00] 2022-Dec-21 TSL2521 − Register O ver view WTIME Register Figure 28: WTIME Note(s): 1. Return to the Register Map (0x89). ALS Interrupt Low Threshold Registers Figure 29: ALS Interrupt Low Threshold Note(s): 1. Return to the Register Map (0x8A, 0x8B, 0x8C). Addr: 0x89 WTIME Bit Field Reset Type Bit Description 7:0 WTIME 0 R/W Sets the WaitTime between 2 measurements of the modulator or sequencer. WTIME together with MOD_TRIGGER_TIMING (in register 0xAE TRIGGER_ MODE) define the actual time between measurements. WaitTime = MOD_TRIGGER_TIMING x WTIME Default: 0 = 0 x (0+1) no WaitTime Addr Bit Field Reset Type Description 0x8A 7:0 AILT0 0R/W ALS Interrupt Low Threshold The ALS interrupt threshold registers are 24-bit wide. ALS interrupt level detection compares the threshold registers with the data accumulated by the selected modulator. The modulator can be selected via ALS_THRESHOLD_ CHANNEL. If AIEN is asserted and the accumulated data is below AILT for the number of consecutive samples specified in APERS, an interrupt is asserted on the interrupt pin (internally AINT_AILT and AINT are asserted) 0x8B 7:0 AILT1 0R/W 0x8C 7:0 AILT2 0R/W |
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