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L99UDL01 Arkusz danych(PDF) 16 Page - STMicroelectronics |
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L99UDL01 Arkusz danych(HTML) 16 Page - STMicroelectronics |
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16 / 88 page ![]() Device description L99UDL01 16/88 DS12511 Rev 5 In all cases the CPLOW bit will remain set indicating that the charge pump was low since the last read & clear of the register. The charge pump frequency can be dithered to reduce the impact on radio frequency emissions. This option is set via bit DITHN in register 03H. By default DITHN=0 and dithering is enabled. It is not recommended that the CP pin is used to power other circuits. The charge pump current capability is intended only for the IC and reverse battery MOSFET. This supply cannot be used for other circuits without potentially causing issues. 2.4 Output functionality There are two groups with three drivers each. The three drivers in each group can be paralleled or driven independently. The output configuration registers identify which outputs are tied together for driving and current regulation purposes. The output configuration registers also provide for a range of current regulation levels and on-time durations. The set up prior to command an actuation requires the following global commands. These are typically set at initialization and are not needed to be altered: 1. If initiating a timed actuation by SPI command: a) After power on reset, with all registers cleared, raise the EN_OUT pin. If the EN_OUT pin is hardwired no action needed. 2. Register 00H: a) Set the desired PWM regulation frequency. 3. Register 01H: a) No activity at this time. 4. Register 02H: a) Set the on-time duration for the actuation. b) Set the braking time duration after the actuation. c) Disable any outputs not using dynamic braking (typically, these outputs would not participate in the locking system). 5. Register 03H: a) Set the groups. This determines which outputs are in parallel (if any). b) Set the Thermal shutdown reaction (Global or individual). c) Set the PWM frequency dithering on/off. Dithering is automatically on (DITH=0). d) Set the Global fault indication bit if desired. 6. Register 04H and 05H a) Set the current regulation /PWM duty cycle levels for each of the outputs / groups. If two internal switches are driving both ends of a load then only one should be current regulating / PWMming. 7. Register 06H a) Set the Drain-Source monitoring parameters (amplitude and duration) for the external MOSFETs. |
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