AS3722 datasheet(57/199 Pages) AMSOSRAM

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[v1-01] 2015-Sep-07

AS3722 − Detailed Descriptions- System Functions

Long ONKEY Press

When applying a high level on the ONKEY input pin for 2s/4s/8s

(depending on on_shutdown_delay) a power_off is initiated.

With the bit onkey_lpress_reset = 1 the chip will generate a reset

cycle. This is thought as a safety feature when the SW hangs up

and no watchdog is used.

Powering down of the regulators can be done immediately or

according to the power-off sequence depending on the

em_shutdown_direct OTP bit.

Figure 54:

ONKEY Longpress Behavior

ONKEY Longpress Behavior: Shows the selectable options for behaving on a long pressReset and Power-Off

Sequence

The regulator power-down sequence is inverted to the

power-up sequence programmed in the OTP. It can be slightly

modified by setting or clearing the sdX_sequ_on and

ldoX_sequ_on bits. The bit is set automatically for all the

regulators defined in the OTP start-up sequence.

• Regulators which have the corresponding sequ_on bit

cleared will be shut down before the power-down

sequence starts.

• Regulators which have the bit set and are in the power-up

sequence of the OTP will shut down in an inverted order.

• Regulators which have the bit set and are not part of the

power-up sequence will shut down after the sequence has

been completed

onkey_lpress_reset

onkey_shutdown_delay

Longpress Behavior

long press feature disabled

power_off after 2s long press delay

power_off after 4s long press delay

power_off after 8s long press delay

long press feature disabled

reset_cycle after 2s long press delay

reset_cycle after 4s long press delay

reset_cycle after 8s long press delay

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