AS3722 datasheet(73/199 Pages) AMSOSRAM

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[v1-01] 2015-Sep-07

AS3722 − Detailed Descriptions- System Functions

Watchdog

Description

The purpose of the watchdog is to detect a deadlock of the

software. If the watchdog is active, it must receive a continuous

trigger signal within a programmable time window. If there is

no signal anymore for a certain time period from a defined pad

or special serial interface bit, it starts either a complete reset

cycle or initiates the power off sequence.

The watchdog is highly configurable by the following register

bits:

• The complete block can be switched on by wtdg_on = 1

and off by wtdg_on = 0.

• The watchdog time window is defined by the register

wtdg_timer between 1s and 128s.

• The trigger signal can be either triggered by setting

wtdg_sw_sig or using a HW signal on one of the GPIO pins

(gpioX_iosf=9).

• If the watchdog expires, the system waits another second

before reacting according to wtdg_mode (OTP setting)

• 0: interrupt 8s before the watchdog expires, only if the

interrupt is not masked

• 1: reset_cycle with re-start

• 2: power_off

• 3: reset_cycle with re-start up to two times, if the

watchdog expires a third time the systems goes into

power_off

• Whether the watchdog caused a reset can be seen in the

reset_reason.

Figure 68:

Watchdog Timing

Watchdog Timing: Shows the basic timing relations of the watchdog counter and related signals.

n-1

n-2

n-1

watchdog

counter

counter set to n

seconds

counter reset by

setting bit

wtdg_sw_sig

wdtg_sw_sig

XINT

interrupt triggered

if enalbed

watchdog expires

action according

to wtdg_mode

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