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AS3722 Arkusz danych(PDF) 68 Page - ams-OSRAM AG |
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AS3722 Arkusz danych(HTML) 68 Page - ams-OSRAM AG |
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68 / 199 page ![]() ams Datasheet Page 67 [v1-01] 2015-Sep-07 Document Feedback AS3722 − Detailed Descriptions- System Functions Vsup_vbat_low Output (de-bounced) GPIOx pin will go high if VSUP falls below vsup_min or VBAT falls below ResVoltFall and SupResEn = 0. The gpioX_mode should be set to output. OC_PG_SD6 Output GPIOx pin will go high if DCDC6 is disabled. GPIOx pin will be low during start-up of DCDC6. After start-up of DCDC6 the GPIOx pin will be high as long DCDC6 is not in a low voltage or overcurrent operation. The inputs may be masked with pg_powergood_sd6_mask and pg_ovcurr_sd6_mask. There is no 90us black-out time like for DCDC0. The gpioX_mode should be set to output. ADC_reference Output By setting adc_buf_on the buffered 1.6V ADC reference is available on GPIO7. The gpio7_mode should be set to “3” (tristate) gpio7_iosf should be set to “0” (normal). Dedicated IO Pins Input Pins ENABLE1/CORE_PWRREQ As long as the ENABLE1 pin is high the DCDC/LDOs operate with the normal register settings. If the ENABLE1 pin goes low the settings will change to the ones stored in regX_voltage_stby. In addition the chip is set into stand-by mode. regX_select_stby defines the order of the regulators for going into stand_by. All other regulators not defined in sdX_stby_on or ldoX_stdby_on will be put into stand_by simultaneously at the end of the sequence. Pulling ENABLE1 pin high will wake-up the chip. The sequence is reversed to going into stand_by. Delays for the sequence can be set with regX_stby_delay and delay_time_stby. ENABLE1 pin is default disabled after start-up from off state. enable1_stby_en and enable1_inv will enable the input and set the polarity. ENABLE2/CPU_PWRREQ ENABLE2 is a dedicated pin to on/off control of SD0. enable2_enable and enable2_inv will enable the input and set the polarity. THERM Is an external signal which triggers an immediate power down similar to VSUP_low or a chip over-temperature event. The chip will not power-on again before the THERM signal is de-asserted. |
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