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Zakładka z wyszukiwarką danych komponentów |
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ST40RA Arkusz danych(PDF) 78 Page - STMicroelectronics |
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ST40RA Arkusz danych(HTML) 78 Page - STMicroelectronics |
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78 / 94 page  ADCS 7260755H STMicroelectronics 78/94 ST40RA A Interconnect architecture A Interconnect architecture This detail is included for information only. It is not recommended to write to any of these registers, without prior consultation from ST, as it could cause the device to malfunction. ST only guarantees correct operation of the device with the default register values. The register reset default values have been programmed to balance the system and give optimum system performance, so there is no need to modify them. For details of other registers see the ST40 System Architecture Manual. The internal architecture of the block is shown in Figure 21. Figure 21: ST40RA interconnect architecture LMI T3 64 64-bit full cross bar conn_2 x 2 EMI T3 32 EMPI T3 32 SH4 subsystem subsystem T3 32 ST40 core PER sub PI Node 2 CPU subsystem Node 1 T3 32 PCI GPDMA T3 32 PCI (t) 100 MHz T3 64 32-bit conn_4 x 4 Full cross bar Programming port Programming port T3 32 |
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