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ST40RA Arkusz danych(PDF) 57 Page - STMicroelectronics |
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ST40RA Arkusz danych(HTML) 57 Page - STMicroelectronics |
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57 / 94 page ![]() 7 Electrical specifications ST40RA 57/94 STMicroelectronics ADCS 7260755H 7.10 Low power CLKIN AC specifications The timings referenced in Figure 17 refer to the case where CLKIN is directly clocked from an external source. In this case care should be taken that the total load on the LPCLKOSC output is <2pF. Symbol Parameter Min Nom Max Units Notes tLCLLCL LPCLKIN period 32.678 kHz a, b a. Measured between corresponding points on consecutive falling edges. b. Variation of individual falling edges from their nominal times. LPCLKIN duty cycle 10 50 90 % tLCr LPCLKIN rise time 10 ns c, d c. When driven by an external clock. d. Transitions must be monotonic within the range VIH to VIL tLCf LPCLKIN fall time 10 ns 3, 4 Table 31: LPCLKIN timings Figure 17: CLKIN timings VDDRTC * 0.8 VDDRTC * 0.2 tLCLLCL 90% 10% tLCf 90% 10% tLCr VDDRTC * 0.5 |
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