ST40RA datasheet(89/94 Pages) STMICROELECTRONICS

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B Implementation restrictions

ST40RA

89/94

STMicroelectronics

ADCS 7260755H

B.6

PIO

B.6.1

PIO default functionality following reset

In the ST40 family device, the operational modes for these registers differ from the standard

architecture definition and are shown in

Table 39.

B.6.2

PCI/PIO alternate functions

The following PIO signals cannot be used when PCI is enabled even if the PCI implementation does

not require the primary pin function.

If PCI is disabled, the alternate functions may be used.

PIO bit configuration

PIO output state

PIO.PC2

PIO.PC1

PIO.PC0

NonPIO functiona

a. State following reset

-0

PIO bidirectional

Open drain

PIO output

Push-pull

PIO bidirectional

Open drain

PIO input

High impedance

PIO input

High impedance

Reserved

Table 39: PIO alternate function registers

Pin name

BPN

Architecture

signal name

Pin function

Row

Col

Default

Alternate

Type

Dir

NOTPREQ0

NOTPCI_REQ0

PCI external request for bus

PIO16

I/O

NOTPREQ1

NOTPCI_REQ1

PCI external request for bus

PIO18

I/O

NOTPREQ2

NOTPCI_REQ2

PCI external request for bus

PIO20

I/O

NOTPREQ3

NOTPCI_REQ3

PCI external request for bus

PIO22

EMPIDREQ1

I/O

Table 40: PCI/PIO alternate functions

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