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AN3090 Arkusz danych(PDF) 7 Page - STMicroelectronics |
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AN3090 Arkusz danych(HTML) 7 Page - STMicroelectronics |
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7 / 19 page ![]() AN3090 Normal mode functionality Doc ID16496 Rev 1 7/19 The plot in Figure 3 shows typical output switching in normal mode at VDD = 3.3 V. Figure 3. Typical output_n functionality in normal mode The following signals are shown on the plot above: ● Ch1 (yellow) = OE/DM2 signal ● Ch2 (blue) = SDI signal ● Ch3 (purple) = VOUT ● Ch4 (green) = OUPUT signal It should be highlighted that the LE/DM1 and OE/DM2 signals are NOT synchronized with the rising or falling edges of the CLK signal. This mechanism is useful in all applications, especially where it is necessary to stop the CLK switching. For example, after the frame loading, it is necessary to stop the CLK switching to reduce noise between the lines. |
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