March 2015

DocID027369 Rev 1

1/17

1

AN4646

Application note

Peripheral interconnections on STM32F401 and STM32F411 lines

Introduction

On top of the highest performance and the lowest power consumption of the STM32F4

family, STM32F401/411 peripherals can communicate autonomously, without any

intervention from the CPU, via a network known as peripheral interconnect matrix.

This STM32F401/411 feature enhances CPU real-time performance while substantially

reducing its energy consumption.

The present document first describes the peripheral interconnect matrix features and then

provides an overview on the peripheral interconnections and on how to configure them

depending on your application. This description is completed by a detailed application

example.

This application note must be read in conjunction with STM32F401 line reference manual

(RM0383) and STM32F411 line reference manual (RM0368). Both documents are available

from http://www.st.com/stm32.

Table 1. Applicable products

Type

Product lines

Microcontrollers

STM32F401

STM32F411

www.st.com