ack

w

ack

rs

r

ack

ack stop

start

msb Chip Address lsb

msb Register Add lsb

msb Chip Address lsb

msb

DATA

lsb

ack from slave

SCL

SDA

ack from slave

ack from slave

ack from master

data from slave

repeated start

start

w ack

addr = h'00

ack

rs

r ack

address h'00 data

ack

stop

id = h'xx

id = h'xx

ack

w

ack

ack

stop

start

msb Chip Address lsb

msb Register Add lsb

msb

DATA

lsb

ack from slave

SCL

SDA

start

w ack

id = h'xx

addr = h'02

ack

address h'02 data

ack

stop

ack from slave

ack from slave

LP3943

SNVS256C – NOVMEBER 2003 – REVISED OCTOBER 2015

www.ti.com

Programming (continued)

w = write (SDA = “0”)

r = read (SDA = “1”)

ack = acknowledge (SDA pulled LOW by either master or slave)

rs = repeated start

xx = 60 to 67

Figure 5. LP3943 Register Write

However, if a READ function is to be accomplished, a WRITE function must precede the READ function, as

shown in Figure 6.

w = write (SDA = “0”)

r = read (SDA = “1”)

ack = acknowledge (SDA pulled LOW by either master or slave)

rs = repeated start

xx = 60 to 67

Figure 6. LP3943 Register Read

7.5.4 Auto Increment

Auto increment is a special feature supported by the LP3943 to eliminate repeated chip and register addressing

when data are to be written to or read from registers in sequential order. The auto increment bit is inside the

register address byte, as shown in Figure 7. Auto increment is enabled when this bit is programmed to “1” and

disabled when it is programmed to “0”.

Bits 5, 6 and 7 in the register address byte must always be zero.

Figure 7. Register Address Byte

10

Submit Documentation Feedback

Copyright © 2003–2015, Texas Instruments Incorporated

Product Folder Links: LP3943