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AD7993 Arkusz danych(PDF) 26 Page - Analog Devices

Numer części AD7993
Szczegółowy opis  4-Channel, 12-/10-Bit ADCs with I2C Compatible Interface in 16-Lead TSSOP
PDF  27 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
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AD7993 Arkusz danych(HTML) 26 Page - Analog Devices

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AD7994/AD7993
–26–
REV. PrF
PRELIMINARYTECHNICAL DATA
Figure 17. Mode 2 Operation
Figure 18. Mode 2 Sequence Operation
Mode 3 - Automatic Cycle Mode
An automatic conversion cycle can be selected and enabled
by writing a value to the Cycle Timer Register. A conver-
sion cycle interval can be set up on the AD7994/AD7993
by programming the relevant bits in the 3-bit Cycle Timer
Register as decoded in Table XIIb. When the Cycle
Timer register is programmed with any configuration
other than all 0’s, a conversion will take place every X ms,
depending on the configuration of these bits in the Cycle
Timer Register. There are 7 different cycle time intervals
to choose from as shown in Table XIIb. Once the conver-
sion has taken place the part powers down again until the
next conversion occurs. To exit this mode of operation the
user must program the Cycle Timer Register to contain
all 0’s. For cycle interval options see Table XIIb Cycle
Timer Intervals. To select a channel(s) for operation in
the cycle mode set the corresponding channel bit(s), D7 to
D4, of the Configuration Register. If more than one chan-
nel bit is set in the Configuration register the ADC will
automatically cycle through the Channel sequence, start-
ing with the lowest channel and working its way up
through the sequence. Once the sequence is complete the
ADC will start converting on the lowest channel again,
continuing to loop through the sequence until the Cycle
timer register contents are set to all 0’s. This mode is
useful for monitoring signals, e.g. battery voltage, tem-
perature etc, interrupting only when the limits are vio-
lated.
9
1
1
A
SCL
9
S
7-BIT ADDRESS
WA COMMAND/ADDRESS POINT BYTE A
SDA
Sr
7-BIT ADDRESS
RA
FIRST DATA BYTE (MSBs)
A
SECOND DATA BYTE (LSBs)
A
SDA
1
1
9
SCL
9
9
Sr/
P
8
ACK BY
AD7994/3
ACK BY
AD7994/3
ACK BY
AD7994/3R
ACK BY
MASTER
NACK BY
MASTER
9
1
1
A
SCL
9
S
7-BIT ADDRESS
WA COMMAND/ADDRESS POINT BYTE A
SDA
FIRST DATA BYTE (MSBs)
A
SECOND DATA BYTE (LSBs)
A
Sr
7-BIT ADDRESS
RA
SDA
9
9
1
1
SCL
9
8
ACK BY
AD7994/3
ACK BY
AD7994/3
ACK BY
AD7994/3
ACK BY
MASTER
FIRST DATA BYTE (MSBs)
A
SECOND DATA BYTE (LSBs)
ACK BY
MASTER
ACK BY
MASTER
9
9
RESULT FROM CH1
RESULT FROM CH2
A/
A



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