VDP3108 datasheet(25/61 Pages) MICRONAS

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ADVANCE INFORMATION

VDP 3108

MICRONAS INTERMETALL

Table 3–1: Control and status registers

I2C Sub

address

Number

of bits

Mode

Function

Default

Name

FP INTERFACE

FP read address

FPRD

FP write address

FPWR

w/r

FP data

FPDAT

FP status

bit [0]

write request

bit [1]

read request

bit [2]

busy

FPSTA

FRONTEND

w/r

input selector luma adc:

bit [1:0]

VIN3

VIN2

VIN1

reserved

input selector, chroma adc:

bit [2]

0/1

select VIN1/CIN

clamping modes:

bit [3]

0/1

clamp on/off for chroma ad converter

bit [4]

0/1

internal/external clamp enable (luma adc)

bit [7:5]

reserved

VIS

DCLC

DCLY

CHROMA PROCESSING

w/r

IF compensation:

bit [1:0]

12 dB

6 dB/oct

0 dB/oct

bit [7:2]

reserved

IFC

w/r

SECAM deemphasis or PAL lowpass peaking filter (1.25 MHz):

bit [4:0]

0...31, PAL/NTSC: 8 SECAM: 24

bit [5]

reserved

chroma bandwidth select:

luma delay adjust (LDY)

PAL/NTSC SECAM

bit [7:6]

narrow

normal

broad

reserved

DEEM

CBW

LUMA PROCESSING

w/r

luma notch frequency

bit [5:0]

0..63/64 YNF = 128

⋅ cos (2π ff/fs)

PAL/SECAM: 25 NTSC: 57

bit [6]

0/1

1: disable adaptive notch filter for SECAM

must be set to 0 in PAL/NTSC

bit [7]

reserved

YNF

YNMD

w/r

luma / chroma matching delay:

bit [4:0]

0..31

delay in clocks (+19)

bit [7:5]

reserved

LDF

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