Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

Preview PDF HTML

STM32F303VC Arkusz danych(PDF) 99 Page - STMicroelectronics

Numer części STM32F303VC
Szczegółowy opis  ARM®-based Cortex®-M4 32b MCUFPU, up to 256KB Flash 48KB SRAM, 4 ADCs, 2 DAC ch., 7 comp, 4 PGA, timers, 2.0-3.6 V
PDF  148 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F303VC Arkusz danych(HTML) 99 Page - STMicroelectronics

Back Button STM32F303VC Datasheet HTML 95Page - STMicroelectronics STM32F303VC Datasheet HTML 96Page - STMicroelectronics STM32F303VC Datasheet HTML 97Page - STMicroelectronics STM32F303VC Datasheet HTML 98Page - STMicroelectronics STM32F303VC Datasheet HTML 99Page - STMicroelectronics STM32F303VC Datasheet HTML 100Page - STMicroelectronics STM32F303VC Datasheet HTML 101Page - STMicroelectronics STM32F303VC Datasheet HTML 102Page - STMicroelectronics STM32F303VC Datasheet HTML 103Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 99 / 148 page
background image
DocID023353 Rev 13
99/148
STM32F303xB STM32F303xC
Electrical characteristics
124
Table 64. I2S characteristics(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Conditions
Min
Max
Unit
fCK
1/tc(CK)
I2S clock frequency
Master data: 16 bits,
audio freq=48 kHz
1.496
1.503
MHz
Slave
0
12.288
tr(CK)
tf(CK)
I2S clock rise and fall
time
Capacitive load
CL = 30 pF
-8
ns
tw(CKH)
I2S clock high time
Master fPCLK= 36 MHz,
audio frequency =
48 kHz
331
-
tw(CKL)
I2S clock low time
332
-
tv(WS)
WS valid time
Master mode
4
-
th(WS)
WS hold time
Master mode
4
-
tsu(WS)
WS setup time
Slave mode
4
-
th(WS)
WS hold time
Slave mode
0
-
Duty Cycle
I2S slave input clock
duty cycle
Slave mode
30
70
%
tsu(SD_MR)
Data input setup time
Master receiver
9
-
ns
tsu(SD_SR)
Data input setup time
Slave receiver
2
-
th(SD_MR)
Data input hold time
Master receiver
0
-
th(SD_SR)
Slave receiver
0
-
tv(SD_ST)
Data output valid time
Slave transmitter
(after enable edge)
-29
th(SD_ST)
Data output hold time
Slave transmitter
(after enable edge)
12
-
tv(SD_MT)
Data output valid time
Master transmitter
(after enable edge)
-3
th(SD_MT)
Data output hold time
Master transmitter
(after enable edge)
2-



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Arkusz danych Pobierz

Go To PDF Page


Link URL



Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Link do karty katalogowej    |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com