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L99MM70XP Arkusz danych(PDF) 56 Page - STMicroelectronics |
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L99MM70XP Arkusz danych(HTML) 56 Page - STMicroelectronics |
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56 / 68 page ![]() SPI control and status registers L99MM70XP 56/68 Doc ID 022637 Rev 2 Table 36. Control register 3 Control register 3 (03h) Bit 15 14 13 12 11 10 9 8 7 6 5 43210 Reset state 0 0 0 0 0 0 0 0 0 1 0 00000 Name reserved OCR Freq OVUVR OUT5 OR OUT4 OR OUT3 OR OUT2 OR OUT1 OR LIN Flash LIN TXD Tout ECVL OUT5 PWM1 OUT4 PWM1 OUT3 PWM1 OUT2 PWM1 OUT1 PWM1 Table 37. Control register 3, bits Bit name Comment reserved Reserved bit, has always to be written to 0 and reads always 0 OCRFREQ OCR frequency: This bit defines the overcurrent recovery frequency of a driver in overcurrent recovery mode 0: 1.7 kHz 1: 3 kHz OVUVR Overvoltage/undervoltage recovery: 1: clear status register to enable the outputs after an overvoltage/undervoltage event 0: outputs are enabled automatically after an overvoltage/undervoltage event OUT5OR Overcurrent recovery enable: 1: the output is automatically reactivated after a delay time with programmable duty cycle (CR3/Bit14) 0: clear status register to enable the output after an overcurrent event OUT4OR OUT3OR OUT2OR OUT1OR LINFLASH LIN flash mode: 0: 20 kbit/s 1: 100 kbit/s LINTXDTout Dominant TxD time-out for the LIN interface: 1: enable the dominant TXD time-out for the LIN interface 0: disable the dominant TXD time-out for the LIN interface ECVL EC voltage limit: 0: max EC voltage = 1.2V 1: max EC voltage = 1.5V OUT5PWM1 If the PWM enable bit is set and the output is enabled, the output is switched on only if the PWM1 input is high, and switched off if the PWM1 input is low. OUT4PWM1 OUT3PWM1 OUT2PWM1 OUT1PWM1 |
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