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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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L99MM70XP Arkusz danych(PDF) 25 Page - STMicroelectronics |
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L99MM70XP Arkusz danych(HTML) 25 Page - STMicroelectronics |
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25 / 68 page  L99MM70XP Description Doc ID 022637 Rev 2 25/68 Serial Data Out (DO) The data output driver is activated by a logical low-level at the CSN input and goes from high impedance to a low or high-level depending on the global error flag (fault condition). The first rising edge of the CLK input after a high to low transition of the CSN pin transfers the content of the selected status register into the data out shift register. Each subsequent falling edge of the CLK shifts out the next bit. Serial Clock (CLK) The CLK input is used to synchronize the input and output serial bit streams. The Data Input (DI) is sampled at the rising edge of the CLK and the Data Output (DO) changes with the falling edge of the CLK signal. |
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