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MAS3587F Arkusz danych(PDF) 36 Page - Micronas

Numer części MAS3587F
Szczegółowy opis  Audio Encoder/Decoder
PDF  82 Pages
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Producent  MICRONAS [Micronas]
Strona internetowa  http://www.micronas.com
Logo MICRONAS - Micronas

MAS3587F Arkusz danych(HTML) 36 Page - Micronas

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MAS 3587F
ADVANCE INFORMATION
36
Micronas
D0:7f1
(continued)
Main I/O Control, continued
bit[1]
Decoder:
0 (reset)
DEMAND MODE (PLL off, MAS 3587F is clock
master)
1
BROADCAST MODE (PLL on, clock of MAS 3587F
locks on data stream)
Encoder: SDI Word Strobe Invert
0 (reset)
do not invert
1
invert incoming word strobe signal
Note: L/R channel swap is present today with the reset value. Correct value
for encoder is “1”. Correct default channel setting will be implemented in future
versions.
bit[0]
Validate
0 (reset)
changes in control memory will be ignored
1
changes in control memory will become effective
Bit[0] is reset after the DSP has recognized the changes. The controller
should set this bit after the other D0 control memory cells have been initialized
with the desired values.
D0:7f2
Interface Status Control (reset = 05hex)
All
This control cell allows to enable/disable the data I/O interfaces. In addition,
the clock of the output data interfaces, S/PDIF and SDO, can be set to a low-
impedance mode.
bit[6]
S/PDIF input selection
0 (reset)
select S/PDIF input 1
1
select S/PDIF input 2
bit[5]
Enable/disable S/PDIF output
0 (reset)
enable S/PDIF output
1
S/PDIF output off (tristate)
Note that S/PDIF audio output is only available for MPEG 1 (sampling fre-
quencies 32, 44.1 and 48 kHz)
bit[4]
Reserved, must be set to zero
bit[3]
Enable/disable serial data output SDO
0SDO on
1 (reset)
SDO off
bit[2]
Output clock characteristic (SDO and S/PDIF outputs)
0
low impedance
1 (reset)
high impedance
bit[1]
reserved, must be set to zero
bit[0]
Enable/disable external serial data input SDI
0
use external audio source (SDI)
1 (reset)
use internal A/D converter as audio source
Both digital outputs, S/PDIF and SPO, and the D/A converters may use the
outgoing audio independent of each other.
Changes at this memory address must be validated by setting bit [0] of D0:7f1.
InterfaceControl
Table 3–7: D0 Control Memory Cells
Memory
Address
(hex)
Function
Name



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