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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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SSM2519ACBZ-R7 Arkusz danych(PDF) 23 Page - Analog Devices |
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SSM2519ACBZ-R7 Arkusz danych(HTML) 23 Page - Analog Devices |
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23 / 28 page  Data Sheet SSM2519 Rev. 0 | Page 23 of 28 SERIAL AUDIO INTERFACE CONTROL REGISTER Address: 0x03, Reset: 0x00, Name: SAI_FMT2 Table 19. Bit Descriptions for SAI_FMT2 Bits Bit Name Settings Description Reset Access 7 BCLK_GEN BCLK internal generation. When BCLK_GEN is enabled, an internally generated BCLK is used. Therefore, routing the BCLK signal to the pin is not required. 0x0 RW 0 External BCLK used 1 Internally generated BCLK used 6 LRCLK_MODE LRCLK mode selection for TDM operation. 0x0 RW 0 50% duty cycle LRCLK 1 Pulse mode LRCLK 5 LRCLK_POL LRCLK polarity control. 0x0 RW 0 Normal LRCLK operation 1 Inverted LRCLK operation 4 SAI_MSB SDATA bit stream order. 0x0 RW 0 MSB first SDATA 1 LSB first SDATA [3:2] SLOT_WIDTH BCLK cycles per frame in TDM modes select. 0x0 RW 00 32 BCLK cycles per slot 01 24 BCLK cycles per slot 10 16 BCLK cycles per slot 11 Reserved 1 BCLK_EDGE BCLK active edge select. 0x0 RW 0 Rising BCLK edge used 1 Falling BCLK edge used 0 RESERVED Reserved. 0x0 RW |
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