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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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STM32L010F4 Arkusz danych(PDF) 76 Page - STMicroelectronics |
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STM32L010F4 Arkusz danych(HTML) 76 Page - STMicroelectronics |
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76 / 91 page  Electrical characteristics STM32L010F4/K4 76/91 DS12323 Rev 3 6.3.17 Communications interfaces I2C interface characteristics The I2C interface meets the timings requirements of the I2C-bus specification and user manual rev. 03 for standard-mode (Sm) with a bit rate up to 100 kbit/s. The I2C timing requirements are guaranteed by design when the I2C peripheral is properly configured (refer to the reference manual for details) and when the I2CCLK frequency is greater than 2 MHz. The SDA and SCL I/O requirements are met with the following restrictions: the SDA and SCL I/O pins are not "true" open-drain. When configured as open- drain, the PMOS connected between the I/O pin and VDDIOx is disabled, but is still present. All I2C SDA and SCL I/Os embed an analog filter (see Table 56 for the analog filter characteristics). Table 56. I2C analog filter characteristics(1) Symbol Parameter Conditions Min Max Unit tAF Maximum pulse width of spikes that are suppressed by the analog filter Range 1 50(2) 100(3) ns Range 2 - Range 3 - 1. Guaranteed by characterization results. 2. Spikes with widths below tAF(min) are filtered. 3. Spikes with widths above tAF(max) are not filtered |
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