STM32L010F4 datasheet(27/91 Pages) STMICROELECTRONICS

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STM32L010F4/K4

Functional overview

3.14.3

Low-power universal asynchronous receiver transmitter (LPUART)

The STM32L010F4/K4 embed one low-power UART. The LPUART supports asynchronous

serial communication with minimum power consumption. It supports half-duplex single-wire

communication and modem operations (CTS/RTS). It allows multiprocessor

communication.

The LPUART has a clock domain independent from the CPU clock, and can wake up the

system from Stop mode, using baudrates up to 46 kbauds. The wakeup events from Stop

mode are programmable and can be one of the following:

•

start bit detection

•

any received data frame

•

a specific programmed data frame

Only a 32.768 kHz clock (LSE) is needed to allow LPUART communication up to

9600 bauds. Therefore, even in Stop mode, the LPUART can wait for an incoming frame

while having an extremely low energy consumption. Higher speed clock can be used to

reach higher baudrates.

LPUART interface can be served by the DMA controller.

3.14.4

Serial peripheral interface (SPI)

The SPI is able to communicate at up to 16 Mbit/s in slave and master modes in full-duplex

and half-duplex communication modes. The 3-bit prescaler gives 8 master mode

frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC

generation/verification supports basic SD Card / MMC modes.

The SPI can be served by the DMA controller.

Refer to Table 8 for the supported modes and features of SPI interface.

3.15

Cyclic redundancy check (CRC) calculation unit

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

configurable generator polynomial value and size.

Auto baud rate detection (4 modes)

Driver enable

1. X = supported.

Table 7. USART implementation (continued)

USART modes/features(1)

USART2

Table 8. SPI implementation

SPI features(1)

1. X = supported.

SPI1

Hardware CRC calculation

I2S mode

TI mode

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