ST25R3916 datasheet(54/157 Pages) STMICROELECTRONICS

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Application information

ST25R3916/7

54/157

DS12484 Rev 4

Figure 18. SPI communication: direct command

Direct command chaining

As shown in Figure 19, direct commands with immediate execution can be followed by

another SPI mode (Read, Write or FIFO) without deactivating the BSS signal in between.

Figure 19. SPI communication: direct command chaining

Loading data in the PT_Memory (PT_Memory load)

Loading data into the PT_Memory is similar to loading data into the FIFO. There are three

mode patterns available to load data into three different parts of the PT_memory, as

indicated in Table 11. The first byte following the mode/address pattern is stored in the

location detailed in Table 11, for consecutive bytes the address is automatically incremented

and data are stored to consecutive addresses.

The user must take care that the number of loaded bytes fits the size of the selected

PT_memory area, not to overwrite data in the following PT_memory areas.

4.3.4

I2C interface

The I2C address is 50h.This interface supports:



Standard mode (100 kHz)



Fast mode (400 kHz)



Fast mode Plus (1 MHz)



High speed mode (3.4 MHz).

Table 12 summarizes the I2C interface signals.

MS42466V1

SCLK rising edge

Data transferred from MCU

SCLK falling edge

Data is sampled

/SS raising edge

indicates start of

command execution

Two leading 1s

indicate

Command Mode

/SS

SCLK

MOSI

MS51649V1

BSS

Direct command

Read, Write or FIFO mode

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