STM32L010R8 datasheet(69/92 Pages) STMICROELECTRONICS

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DS12325 Rev 3

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STM32L010K8 STM32L010R8

Electrical characteristics

Output driving current

The GPIOs (general purpose input/outputs) can sink or source up to ±8 mA, and sink or

source up to ±15 mA with the non-standard VOL/VOH specifications given in Table 49.

In the user application, the number of I/O pins which can drive current must be limited to

respect the absolute maximum rating specified in Section 6.2:

•

The sum of the currents sourced by all the I/Os on VDD, plus the maximum Run

consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating

IVDD(Σ) (see Table 13).

•

The sum of the currents sunk by all the I/Os on VSS plus the maximum Run

consumption of the MCU sunk on VSS cannot exceed the absolute maximum rating

IVSS(Σ) (see Table 13).

Output voltage levels

Unless otherwise specified, the parameters given in Table 49 are derived from tests

performed under ambient temperature and VDD supply voltage conditions summarized in

Table 15. All I/Os are CMOS and TTL compliant.

Table 49. Output voltage characteristics

Symbol

Parameter

Conditions

Min

Max

Unit

VOL(1)

1. The IIO current sunk by the device must always respect the absolute maximum rating specified in Table 13.

The sum of the currents sunk by all the I/Os (I/O ports and control pins) must always be respected and

must not exceed ΣIIO(PIN).

Output low level voltage for an I/O pin

CMOS port(2),

IIO = +8 mA

2.7 V ≤ VDD ≤ 3.6 V

2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.

-0.4

VOH(3)

3. The IIO current sourced by the device must always respect the absolute maximum rating specified in

Table 13. The sum of the currents sourced by all the I/Os (I/O ports and control pins) must always be

respected and must not exceed ΣIIO(PIN).

Output high level voltage for an I/O pin

VDD - 0.4

VOL (1)

Output low level voltage for an I/O pin

TTL port(2),

IIO = +8 mA

2.7 V ≤ VDD ≤ 3.6 V

-0.4

VOH (3)(4)

4. Guaranteed by characterization results, not tested in production.

Output high level voltage for an I/O pin

TTL port(2),

IIO = –6mA

2.7 V ≤ VDD ≤ 3.6 V

2.4

VOL(1)(4) Output low level voltage for an I/O pin

IIO = +15 mA

2.7 V ≤ VDD ≤ 3.6 V

-1.3

VOH(3)(4) Output high level voltage for an I/O pin

IIO = –15 mA

2.7 V ≤ VDD ≤ 3.6 V

VDD - 1.3

VOL(1)(4) Output low level voltage for an I/O pin

IIO = +4 mA

1.8 V ≤ VDD ≤ 3.6 V

-0.45

VOH(3)(4) Output high level voltage for an I/O pin

IIO = –4 mA

1.8 V ≤ VDD ≤ 3.6 V

VDD - 0.45

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