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STM32L010R8 Arkusz danych(PDF) 74 Page - STMicroelectronics |
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STM32L010R8 Arkusz danych(HTML) 74 Page - STMicroelectronics |
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74 / 92 page ![]() Electrical characteristics STM32L010K8 STM32L010R8 74/92 DS12325 Rev 3 Equation 1: RAIN max formula The presented formula above (Equation 1) is a representation of an hypothetical ideal ADC and illustrates how the parameters influence each other. It is not to be used for computation of actual values. tSTAB(3) Power-up time - 0 0 1 µs tConV(3) Total conversion time (including sampling time) fADC = 16 MHz 0.875 - 10.81 µs - 14 to 173 (tS for sampling +12.5 for successive approximation) 1/fADC 1. VDDA minimum value can be decreased in specific temperature conditions. Refer to Table 53: RAIN max for fADC = 16 MHz. 2. A current consumption proportional to the APB clock frequency has to be added Refer to Table 29: Peripheral current consumption in run or Sleep mode. 3. Guaranteed by design, not tested in production. 4. Standard channels have an extra protection resistance which depends on supply voltage. Refer to Table 53: RAIN max for fADC = 16 MHz. Table 52. ADC characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit RAIN TS fADC CADC 2 N2 + () ln × × ---------------------------------------------------------------- R ADC – < Table 53. RAIN max for fADC = 16 MHz(1) Ts (cycles) tS (µs) RAIN max for fast channels (kΩ) RAIN max for standard channels (kΩ) VDD > 2.7 V VDD > 2.4 V VDD > 2.0 V VDD > 1.8 V 1.5 0.09 0.5 < 0.1 NA NA NA 3.5 0.22 1 0.2 < 0.1 NA NA 7.5 0.47 2.5 1.7 1.5 < 0.1 NA 12.5 0.78 4 3.2 3 1 NA 19.5 1.22 6.5 5.7 5.5 3.5 NA 39.5 2.47 13 12.2 12 10 NA 79.5 4.97 27 26.2 26 24 < 0.1 160.5 10.03 50 49.2 49 47 32 1. Guaranteed by design. |
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