CLRC663 datasheet(39/177 Pages) NXP

39 / 177 page

NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

TxClkMode (binary)

Tx1 and TX2 output

Remarks

000

High impedance

001

output pulled to 0 in any case

010

output pulled to 1 in any case

110

RF high side push

open-drain, only high side (push) MOS supplied with clock,

clock parity defined by invtx; low side MOS is off

101

RF low side pull

open-drain, only low side (pull) MOS supplied with clock,

clock parity defined by invtx; high side MOS is off

111

13.56 MHz clock derived from 27.12

MHz quartz divided by 2

push/pull Operation, clock polarity defined by invtx; setting

for 10 % modulation

Table 30. Settings for TX1 and TX2

set_residual_carrier (decimal)

residual carrier [%]

modulation index [%]

0.5

1.0

2.0

3.1

4.7

5.8

7.0

7.5

8.1

8.7

9.3

9.9

10.5

11.1

11.7

12.4

13.0

13.6

14.3

14.9

16.3

17.6

19.0

21.2

25.0

Table 31. Setting residual carrier and modulation index by TXamp.set_residual_carrier

CLRC663

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5.3 — 3 January 2024

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