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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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CLRC663 Arkusz danych(PDF) 9 Page - NXP Semiconductors |
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CLRC663 Arkusz danych(HTML) 9 Page - NXP Semiconductors |
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9 / 177 page  NXP Semiconductors CLRC663 High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus Pin Symbol Type Description 18 TVDD PWR transmitter voltage supply 19 XTAL1 I crystal oscillator input: Input to the inverting amplifier of the oscillator. This pin is also the input for an externally generated clock (fosc = 27.12 MHz) 20 XTAL2 O crystal oscillator output: output of the inverting amplifier of the oscillator 21 PDOWN I Power Down (RESET) 22 CLKOUT / OUT6 O clock output / general purpose output 6 23 SCL O Serial Clock line 24 SDA I/O Serial Data Line 25 PVDD PWR pad power supply 26 IFSEL0 / OUT4 I host interface selection 0 / general purpose output 4 27 IFSEL1 / OUT5 I host interface selection 1 / general purpose output 5 28 IF0 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I2C, I2C-L 29 IF1 I/O interface pin, multifunction pin: Can be assigned to host interface SPI, I2C, I2C-L 30 IF2 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I2C, I2C-L 31 IF3 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I2C, I2C-L 32 IRQ O interrupt request: output to signal an interrupt event 33 VSS PWR ground and heat sink connection Table 4. Pin description...continued [1] This pin is used for connection of a buffer capacitor. Connection of a supply voltage might damage the device. 7.2 Pin description VFBGA36 Symbol Pin Type Description IF2 A1 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I2C, I2C-L IF1 A2 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I2C, I2C-L IF0 A3 I/O interface pin, multifunction pin: Can be assigned to host interface RS232, SPI, I2C, I2C-L IFSEL1 A4 I host interface selection 1 / general purpose output 5 PVDD A5 PWR pad power supply PDOWN A6 I Power Down (RESET) IRQ B1 O interrupt request: output to signal an interrupt event TDI / OUT1 B2 I/O test data input boundary scan interface / general purpose output 1 TMS / OUT2 B3 I/O test mode select boundary scan interface / general purpose output 2 TDO / OUT0 B4 O test data output for boundary scan interface / general purpose output 0 SCL B5 I Serial Clock line Table 5. Pin description VFBGA36 CLRC663 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 5.3 — 3 January 2024 9 / 177 |
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