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AX88796ALF Arkusz danych(PDF) 66 Page - ASIX Electronics Corporation |
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AX88796ALF Arkusz danych(HTML) 66 Page - ASIX Electronics Corporation |
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66 / 68 page ![]() 66 AX88796ALF 3-in-1 Local Bus Fast Ethernet Controller Copyright © 2006-2013 ASIX Electronics Corporation. All rights reserved. 3. When /RDY not connect, following steps must include in driver when “READ” data port a) A minimum delay 7 LCLKs must wait between Remote DMA read command ready and 1 st data valid. Or modify Remote DMA read command order as below. No need a minimum delay 7 LCLKs when using new remote DMA read command order. b) Special restrictions on back-to-back read/write cycle if /RDY did not connect to CPU The host processor (CPU) is required to wait the specified period of time behind some special register access. Performing “dummy” reads of “Reserved” register (such as offset 1Ch) is a convenient way to guarantee that the minimum wait time restriction is met. The table below also shows the number of dummy reads that are required for back-to-back access behind some special register access. It can be ignored “dummy” delay if host processor back-to-back Tcycle is longer than AX88796A internal busy. RESISTER NAME Wait for AX88796A BUSY (In LCLK count) Or perform this read of Reserved register (Assuming Tcycle of 3 LCLK) COMMAND CR (00h) 2.5 1 Write CR Page0 (03h) 2.5 1 Write BNRY Page0 (07h) 2.5 1 Write ISR Page0 (08h) 2.5 1 Write RSAR0 Page0 (09h) 2.5 1 Write RSAR1 Page0 (0Ah) 2.5 1 Write RBCR0 Page0 (0Bh) 2.5 1 Write RBCR1 Page1 (07h) 2.5 1 Write CPR DP (10h) 2.5 1 Write Data Port Page0 (0Dh) 2.5 1 Read (0Dh) Reserved Page0 (0Eh) 2.5 1 Read CRC error counter Page0 (0Fh) 2.5 1 Read Miss Packet counter DP (10H) 2.5 1 Read Data Port Reset (1Fh) 2.5 1 Read (1Fh) Software reset ORGINAL WRITE RSAR1 WRITE RSAR0 WRITE RBCR1 WRITE RBCR0 WRITE CR (remote read) READ DP READ DP New Remote DMA read command order WRITE RSAR1 WRITE RSAR0 WRITE CR (remote read) WRITE RBCR1 WRITE RBCR0 READ DP READ DP LCLK/XTALIN AX88796A internal busy /READ or /WRITE “dummy” reads of “Reserved” register |
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