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PWD5T60 Arkusz danych(PDF) 2 Page - STMicroelectronics |
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PWD5T60 Arkusz danych(HTML) 2 Page - STMicroelectronics |
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2 / 27 page ![]() 1 Block diagram Figure 1. PWD5T60 block diagram SGND PGND LOGIC SHOOT THROUGH PREVENTION DEADTIME Floating structure +5V IOD Input noise filter + VREF + - +5V OverTemperature Protection VCC UVLO Detection Input noise filter Input noise filter EN noise filter Input noise filter Input noise filter Input noise filter smartSD Comparator input filter Floating structure Floating structure VCC UVLO VCC UVLO VCC VCC VCC D1 D2 D3 VBO UVLO & Level shifter VBO UVLO & Level shifter VBO UVLO & Level shifter VCC VCC VCC LVG1 LVG2 LVG3 BOOT3 OUT3 HVG3 BOOT1 OUT1 HVG1 BOOT2 OUT2 HVG2 VCC HIN1 HIN2 HIN3 LIN1 LIN2 LIN3 EN FAULT OD OUT1 OUT2 OUT3 VS PWD5T60 Block diagram DS14558 - Rev 2 page 2/27 |
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