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LT7184S Arkusz danych(PDF) 10 Page - Analog Devices |
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LT7184S Arkusz danych(HTML) 10 Page - Analog Devices |
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10 / 52 page ![]() Data Sheet LT7184S analog.com Rev. 0 10 of 52 FREQUENCY_SWITCH and is guaranteed for duty cycles < 50%; current limits are specified at VOUT/L = 2V/μH and FREQUENCY_SWITCH = 1000. Maximum load current is higher with positive loads and equals the valley current plus one-half of the inductor ripple current. Maximum load current is lower with negative loads and equals the valley current minus one-half of the inductor ripple current. See the Applications Information section and Typical Performance Characteristics for more details. 3 READ_IOUT is tested in a production test mode at full rated current where ISW flows through the synchronous switch at 100% duty cycle. In applications, READ_IOUT is calculated from sampled current measurements across the synchronous switch. 4 EEPROM endurance is guaranteed by design, characterization, and correlation with statistical process controls. Data retention is production tested via a high-temperature bake at the wafer level. The minimum retention specification applies for devices whose EEPROM has been cycled less than the minimum endurance specification. 5 Guaranteed by design, characterization, and correlation with statistical process controls. |
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