MRF49XA-ISLASHT datasheet(52/102 Pages) MICROCHIP

52 / 102 page

MRF49XA

DS70590C-page 52

Preliminary

3.8

Initialization

Certain control register values must be initialized for

the basic operations of MRF49XA. These values differ

from the Power-on Reset values and provide improved

operational parameters. These settings are normally

made once after a Reset. After initialization, the

MRF49XA device features can be configured for the

application. Here, accessing a register is implied as a

command to the MRF49XA device through the SPI

port. The steps to be followed for the initialization of

MRF49XA using the control registers are as follows:

Set FIFORSTREG.

Enable synchronous latch from FIFORSTREG.

Program frequency band and crystal load

capacitance from GENCREG.

Enable AFC function from AFCCREG.

Set center frequency through CFSREG for

transmit or receive frequency.

Set data rate through DRSREG.

Enable required functions (transmit, receive,

etc.) from PMCREG.

Configure RXCREG.

Configure TXCREG.

10. Tune in the antenna.

11. Turn off the transmitter and turn on the receiver.

12. Enable FIFO for data reception.

13. Set FIFORSTREG.

14. Enable synchronous latch from FIFORSTREG.

15. Read STSREG.

The following steps should be followed to tune in the

antenna section:

Turn on the transmitter section from PMCREG.

Wait for 5 ms for the oscillator to get stabilized.

The registers associated with initialization are:

•STSREG (see Register 2-1)

• GENCREG (see Register 2-2)

• AFCCREG (see Register 2-3)

•TXCREG (see Register 2-4)

•CFSREG (see Register 2-6)

• RXCREG (see Register 2-7)

• FIFORSTREG (see Register 2-10)

• DRSREG (see Register 2-12)

• PMCREG (see Register 2-13)

3.9

Interrupts

The advanced interrupt handler circuit is implemented

in the MRF49XA to reduce the power consumption. As

mentioned, the Sleep mode is the lowest power

consumption mode in which the mode clock and all

functional blocks of the chip are disabled. However, the

WUT and LBD circuits can be active if enabled. In case

of any interrupt, the device wakes up, switches to the

Active mode and an interrupt signal generated on the

IRO pin of the device indicates the change in state or

occurrence of an interrupt to the host microcontroller.

The source of the interrupt is determined by reading the

status word of the device (see Register 2-1).

The receiver generates an active-low interrupt request

for the microcontroller at the following events:

• TXBREG is ready to receive the next byte

• RXFIFOREG has received the preprogrammed

amount of bits

• RXFIFOREG overflow/TXBREG underrun

• Negative pulse on Interrupt Input pin (INT)

• Wake-up Timer Time-out (WUTINT)

• Supply voltage below the preprogrammed value is

detected

• Power-on Reset

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