DP8105 5A DC-DC Intelligent dPOL Data Sheet

BCD.00261 Rev. 1.0, 12 Feb 2013

www.power-one.com

Page 24 of 35

1.2

OK Fault and Error Coding

dPWER

and receive information from other devices in the power system belonging to the same group as to the kind of turn-

off procedure a device has initiated because of a fault.

Figure 40 shows the three types of OK encoding. The bubbles show when the SD and OK line logic levels are

sampled by dPOL and the DPM logic.

Figure 40. OK Severity Encoding Waveforms

Note that the OK line state changes are always executed by dPOLs at the negative edge of the SD line.

The chart shows shut down response types as the user can select the kind of response desired for each type of

Fault or Error (within the limits of choice provided for each type of Fault or Error) .All dPOL devices in the same

Group are expected to trigger the same turn-off procedure in order to maintain overall tracking of output voltages

in the system. And when fault propagation is set to go from one group to another, the encoding is passed along

un-changed.

7.5

Switching and Compensation

dPWER

The controller enables users to program most of the

PWM performance parameters, such as switching

frequency, interleave, duty cycle, and feedback loop

compensation.

7.5.1

Switching Frequency

The switching frequency of the DP8105 can be

programmed to either 500KHz or 1MHz in the GUI

PWM Controller window shown in Figure 41 or

directly via the I2C bus by writing into the INT

register shown in Figure 42. Note that the content of

the register can be changed only when the dPOL is

turned off.

Each dPOL is equipped with a PLL that locks to the

500 KHzSD signal which is generated by the DPM.

This sets up for switching actions to be synchronous

to the falling edge of SD by all dPOLs, which are

thereby kept coordinated to each other.

Although synchronized to SD, switching frequency

selection is independent for each dPOL, with the

exception of shared load bus groups, where dPOLs

attached to a shared load bus are forced to use the

same frequency by the GUI.

Figure 41. PWM Controller Window

In some applications, switching at higher frequencies

is desirable even though efficiency is lower, because

it allows for better transient response or lower

application system noise.